<?xml version="1.0" encoding="UTF-8"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:atom="http://www.w3.org/2005/Atom" version="2.0"><channel><title><![CDATA[OpenIPHub]]></title><description><![CDATA[OpenIPHub]]></description><link>https://www.openiphub.com/blog</link><generator>RSS for Node</generator><lastBuildDate>Sat, 05 Sep 2026 22:02:34 GMT</lastBuildDate><atom:link href="https://www.openiphub.com/blog-feed.xml" rel="self" type="application/rss+xml"/><item><title><![CDATA[Pushing UberDDR3 Frequency Through RTL Cleanup - Post #18]]></title><description><![CDATA[A step-by-step walkthrough of pushing UberDDR3 from 90 MHz to 132 MHz using RTL cleanup and the OpenXC7 open-source FPGA flow.]]></description><link>https://www.openiphub.com/post/pushing-uberddr3-frequency-through-rtl-cleanup-post-18</link><guid isPermaLink="false">6968262fbbaf501a67d985ef</guid><pubDate>Fri, 13 Feb 2026 10:33:34 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_3ec972068e2a4ca88d3b50a9056d3949~mv2.png/v1/fit/w_740,h_344,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[FPGA Builds Without Local Toolchains: An Intro to CaaS - Post #17]]></title><description><![CDATA[If you’ve been curious about open-source FPGA flows but felt blocked by setup complexity, CaaS makes it simple for you,]]></description><link>https://www.openiphub.com/post/fpga-builds-without-local-toolchains-an-intro-to-caas</link><guid isPermaLink="false">6961f3f2768b848d270e1b8d</guid><pubDate>Thu, 22 Jan 2026 10:49:24 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_1e92044499d44b1cb953850d9eec0a0e~mv2.png/v1/fit/w_1000,h_1000,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[How UberDDR3 Stays Stable: GoCD-Powered CI for Serious Hardware - Post #16]]></title><description><![CDATA[Read through how UberDDR3 uses GoCD for its CI pipeline: from lint to full hardware build!]]></description><link>https://www.openiphub.com/post/how-uberddr3-stays-stable-gocd-powered-ci-for-serious-hardware-post-16</link><guid isPermaLink="false">6836d435c2ed710b96ce36ad</guid><pubDate>Wed, 04 Jun 2025 10:36:06 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_b4cc27cfea964dcea3eeeb008dccede3~mv2.png/v1/fit/w_1000,h_870,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[UberDDR3 on Lattice ECP5: Expanding FPGA Support - Post #15]]></title><description><![CDATA[UberDDR3 now running on Lattice ECP5!]]></description><link>https://www.openiphub.com/post/uberddr3-on-lattice-ecp5-expanding-fpga-support</link><guid isPermaLink="false">680454f45473c994f1bc9b57</guid><pubDate>Fri, 02 May 2025 10:36:08 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_4edeaa98039042a0a3af4d0f16d08ea5~mv2.png/v1/fit/w_1000,h_1000,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[UberDDR3 + OpenXC7: Open-Source DDR3 Controller Meets Open-Source FPGA Toolchain - Post #14]]></title><description><![CDATA[UberDDR3, the open-source DDR3 controller, now works with OpenXC7, the open-source FPGA toolchain!]]></description><link>https://www.openiphub.com/post/uberddr3-openxc7-open-source-ddr3-controller-meets-open-source-fpga-toolchain</link><guid isPermaLink="false">67d2a0994c083e6754268830</guid><pubDate>Fri, 21 Mar 2025 11:54:09 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_67fb3b85d9e943ee9694d8f8a1e8d649~mv2.png/v1/fit/w_1000,h_1000,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[Pushing UberDDR3 to Higher Speeds: DDR3-1333 &#38; DDR3-1600! - Post #13]]></title><description><![CDATA[UberDDR3 has come a long way! Once capped at DDR3-800, it can now push DDR3-1333 and even DDR3-1600.]]></description><link>https://www.openiphub.com/post/pushing-uberddr3-to-higher-speeds-ddr3-1333-ddr3-1600-post-13</link><guid isPermaLink="false">67af29332ad0a44a5cc16c93</guid><pubDate>Fri, 28 Feb 2025 11:32:01 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_de442fc9730e48d7ab90c96fa52b5159~mv2.png/v1/fit/w_1000,h_946,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[Thermal Management for UberDDR3 with XADC - Post #12]]></title><description><![CDATA[Explore how to integrate XADC with UberDDR3 for thermal management]]></description><link>https://www.openiphub.com/post/thermal-management-for-uberddr3-with-xadc</link><guid isPermaLink="false">6782166c4c96f1379dfa2344</guid><pubDate>Fri, 17 Jan 2025 10:08:09 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_fccd92be39bd41dba1a7ce079e822980~mv2.png/v1/fit/w_1000,h_1000,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[SPD Reader for UberDDR3 - Post #11]]></title><description><![CDATA[Serial Presence Detect (SPD) reader for UberDDR3]]></description><link>https://www.openiphub.com/post/spd-reader-for-uberddr3-post-11</link><guid isPermaLink="false">6774afe620c3f052c34ed892</guid><pubDate>Sat, 11 Jan 2025 06:21:55 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_97bf54761c53415683723431cd77040e~mv2.png/v1/fit/w_1000,h_734,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[Unlocking More Memory: Dual-Rank DIMM Support in UberDDR3 - Post #10]]></title><description><![CDATA[Dual rank support is now available!]]></description><link>https://www.openiphub.com/post/unlocking-more-memory-dual-rank-dimm-support-in-uberddr3-post-10</link><guid isPermaLink="false">676b31efd3ed4aacad187ea7</guid><pubDate>Fri, 03 Jan 2025 00:21:46 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_66a18f5965124ed69f60cf30c43d4642~mv2.jpg/v1/fit/w_1000,h_1000,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[UberDDR3 Self-Refresh: Reducing Power Consumption in Idle Periods - Post #9]]></title><description><![CDATA[Elaborates on the new self-refresh feature, with testbench simulation and project demonstration]]></description><link>https://www.openiphub.com/post/uberddr3-self-refresh-reducing-power-consumption-in-idle-periods-post-9</link><guid isPermaLink="false">67677b86d361a658c7062b46</guid><pubDate>Fri, 27 Dec 2024 07:43:20 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_6a3baffce18a46a8858700b9f9f31047~mv2.png/v1/fit/w_1000,h_524,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[UberDDR3 + MicroBlaze (Part 2) - Post #8]]></title><description><![CDATA[Implement Dhrystone Test and Ethernet Echo Server powered by UberDDR3!]]></description><link>https://www.openiphub.com/post/uberddr3-microblaze-part-2-post-8</link><guid isPermaLink="false">67244523fc05f44d5c172e31</guid><pubDate>Fri, 01 Nov 2024 11:08:42 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_2653ab2d70b44a9983ef47cbff2cf27f~mv2.png/v1/fit/w_514,h_369,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[UberDDR3 + MicroBlaze (Part 1) - Post #7]]></title><description><![CDATA[Learn how to add UberDDR3 into the Vivado IP catalog and integrate with MicroBlaze Block Design.]]></description><link>https://www.openiphub.com/post/uberddr3-microblaze-part-1-post-7</link><guid isPermaLink="false">671c43796cf7bc1f5dedad3a</guid><pubDate>Mon, 28 Oct 2024 12:00:28 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_a307b685a04c41d1b4d12513e0e52834~mv2.png/v1/fit/w_1000,h_768,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[UberDDR3 Feature Update: Error Correction (Part 2) - Post #6]]></title><description><![CDATA[Explore the more advanced in-line ECC implementation on UberDDR3]]></description><link>https://www.openiphub.com/post/uberddr3-feature-update-error-correction-part-2-post-6</link><guid isPermaLink="false">66b843c9fec70fb2323fa95a</guid><pubDate>Fri, 23 Aug 2024 08:14:37 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_666e0fec68ba4f8d8d6544f251a1675f~mv2.png/v1/fit/w_1000,h_647,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[UberDDR3 Update: Error Correction (Part 1) - Post #5]]></title><description><![CDATA[UberDDR3 New Feature Alert: Error Correction Code is now available!]]></description><link>https://www.openiphub.com/post/uberddr3-feature-update-error-correction-part-1-post-5</link><guid isPermaLink="false">66a7803fa834d3511f838343</guid><pubDate>Thu, 15 Aug 2024 16:00:00 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_15c0cf37cb4b498eaaa584cb98d2ff20~mv2.png/v1/fit/w_1000,h_630,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[UberDDR3 Update: AXI4 Interface - Post #4]]></title><description><![CDATA[UberDDR3 new feature alert: AMBA AXI4 interface is now available!]]></description><link>https://www.openiphub.com/post/uberddr3-new-feature-axi4-interface</link><guid isPermaLink="false">66529e12c22f32b8bc3e8b5b</guid><pubDate>Fri, 12 Jul 2024 11:28:43 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_b27608bff564476ba4b085ec75381aa2~mv2.png/v1/fit/w_1000,h_535,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[Getting Started with UberDDR3 (Part 2) - Post #3]]></title><description><![CDATA[Tutorial on implementing UberDDR3 on actual hardware with an example design demonstration]]></description><link>https://www.openiphub.com/post/getting-started-with-uberddr3-part-2-post-3</link><guid isPermaLink="false">662de1dfbe804e61442a9814</guid><pubDate>Fri, 05 Jul 2024 11:25:29 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_21b71560fd494ffab9f5e9d6544ba01d~mv2.png/v1/fit/w_1000,h_1000,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[Getting Started with UberDDR3 (Part 1) - Post #2]]></title><description><![CDATA[Tutorial on how to run simulations in UberDDR3 and understand how it operates beneath the surface. ]]></description><link>https://www.openiphub.com/post/getting-started-with-uberddr3-part-1-post-2</link><guid isPermaLink="false">66231935f1982c6198303d50</guid><pubDate>Fri, 28 Jun 2024 06:50:02 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_dc2186bcc94f4cc48634169d9c6e4868~mv2.png/v1/fit/w_1000,h_393,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[UberDDR3: An Opensource DDR3 Controller - Post #1]]></title><description><![CDATA[Introduction to UberDDR3 Project, its current and upcoming features.]]></description><link>https://www.openiphub.com/post/uberddr3-an-opensource-ddr3-controller-post-1</link><guid isPermaLink="false">65f817b6e502e92bf97f74f0</guid><pubDate>Wed, 19 Jun 2024 10:42:17 GMT</pubDate><enclosure url="https://static.wixstatic.com/media/f6ec2b_ea4ee79b882444da9a78a586e718d4da~mv2.png/v1/fit/w_1000,h_524,al_c,q_80/file.png" length="0" type="image/png"/><dc:creator>Angelo Jacobo</dc:creator></item><item><title><![CDATA[Introducing OpenIPHub: Your Gateway to Digital IC Design and FPGA Projects - Post #0]]></title><description><![CDATA[Welcome to OpenIpHub a place where my journey with digital design and FPGA projects gets shared with you]]></description><link>https://www.openiphub.com/post/introducing-openiphub-your-gateway-to-digital-ic-design-and-fpga-projects-post-0</link><guid isPermaLink="false">65f2d20d42acd2d544280eae</guid><pubDate>Mon, 17 Jun 2024 10:32:49 GMT</pubDate><enclosure url="http://www.youtube.com/watch?v=azBM6czbunY" length="0" type="video"/><dc:creator>Angelo Jacobo</dc:creator></item></channel></rss>